Microcontrollers generally constitute a system on a chip and comprise a microprocessor and a plurality of peripheral components. A wide variety of such microprocessor/microcontrollers exist having 8-bit, 16-bit and 32-bit architecture. Existing microprocessor/microcontrollers such as 8-bit microcontrollers manufactured by Microchip Technology Inc. provide for a flexible architecture. Such microprocessor/microcontrollers may comprise a Harvard architecture in which program and data memories are separated. Microprocessor/microcontrollers of this type further may comprise a specific banking system that allows access to the data memory. To this end, generally, the data memory is divided in a plurality of banks and a bank select register defines which of the banks is currently selected and accessible. To provide such a microprocessor/microcontrollers access to certain registers, such as a special function register, a register file, or any other register, the banking scheme may be designed to memory-map a plurality of such registers into most of the banks. Hence, a reduced number of memory locations within most banks is freely usable as a general purpose memory area. FIG. 1 explains this common concept more clearly. A physical memory space 100 is divided into a plurality of memory banks 1101 . . . 110n, wherein only one bank is generally accessible to a central processing unit at a time. On the right side of FIG. 1 a single exemplary memory bank and its exemplary structure is shown. For example, a first memory range 120 of bank 110x may be memory mapped to common core special function registers (SFR) and adjacent or following memory area 130 to other SFRs used for peripherals. The following memory area 140 comprises general purpose registers (GPR) and memory area 150 is used for common memory. In one embodiment, such as an 8-bit microprocessor/microcontrollers each bank has 128 bytes and memory area 120 includes 12 common core SFRs, memory area 130 includes 20 SFRs, memory area 140 includes 80 GPRs and memory area 150 includes 16 bytes. Other implementations with a different memory mapping scheme of SFR or other registers may apply and depends on the architecture design.
Besides access to the memory 100 through this banking scheme, special function registers may be implemented that allow to indirectly access the whole or a bigger part of the linearized memory 100. However, the SFRs or in other implementations other registers which are memory-mapped to at least a plurality of banks do not allow for a single continuous larger memory area.
Hence, there exists a need for an improved architecture of a microprocessor/microcontrollers using a banking access scheme.